Modern integrated circuits (ICs) are known to consume high current in a wide frequency range which has to be reliably provided by the IC power supply in order to ensure IC functionality. Therefore, power supply and its distribution is a critical item in high end electronic designs that need to fulfill ambitious requirements with respect to reliability and low impedance. IC design and implementation is complex and requires deep insight into the frequency-dependence of the operating behavior which, in turn, is influenced by board and package design. In particular, the IC's power supply network structure has to reliably provide sufficient power in each individual load location within the system. A variety of power domains need to be taken into account, and stable supply voltage levels have to be ensured at each load, independently of its actual current demand. In order to provide the desired functionality for the IC under consideration, there is a need for an unbiased verification methodology that is able to verify power supply functionality and robustness during early VLSI tests, first module tests, as well as final compound operation in a system environment. This power supply verification methodology should be quantitative, must disclose interference, and must provide guidance to specific improvements. Also, the analysis method must be applicable for model-to-hardware verification.
Typically, power supply voltage integrity is measured in the time domain at a load location subject to selected power demand conditions. The power supply voltage excursions depend mostly on the specific operational power demand and therefore do not overall reveal general power supply distribution properties such as, e.g., the power supply impedance profile.
A correctly scaled power supply impedance profile Z(f), which expresses the impedance of the power supply as a function of frequency f, is a quantitative measure of specific local power supply network properties. In order to determine the power supply impedance profile Z(f) at a specific load location within the system, the associated voltage and current spectra U(f), I(f) at the location have to be determined. Compared to current measurements, local power supply voltage U(t) can be measured easily as a function of time and transformed into the frequency domain. Measurement of local power supply current I(t), however, is difficult and error-prone, leading to inaccuracies of the Fourier transform I(f) of the current thus measured. As a consequence, evaluation of the power supply impedance Z(f), as calculated from the ratio of the voltage and current spectra U(f), I(f), is not very accurate, especially in VLSI designs.
U.S. Pat. No. 6,768,952 describes a method for determining the impedance of a system by measuring current at various clock frequencies. The clock frequency is toggled between two frequencies, thereby generating a periodic current waveform, and the clock frequency dependent voltage noise is measured. This method is quite cumbersome and error-prone since it requires manual filtering and multiple measurements to determine the impedance profile over a wide frequency range.
U.S. Pat. No. 7,203,608 discloses a method for measuring power supply impedance in the frequency domain by applying a power supply pseudo current impulse and measuring the power supply voltage. The current is derived from a measurement of the switching charge. This pseudo current impulse is difficult to create and control, and a measurement of switching charge during the current impulse is complicated and error-prone.
U.S. Pat. No. 6,911,827 describes a method for determining the impedance of a microprocessor by generating current levels at a predetermined number of different clock frequencies and determining an impedance of the microprocessor power supply by dividing a Fourier component of the filtered average voltage by a Fourier component of the periodic current waveforms. Again, this method is cumbersome and error-prone, since it involves manual filtering and multiple measurements to determine the impedance profile.
Publication “Integrated Power Supply Frequency Domain Impedance Meter (IFDIM)” by Alex Waizman et al. (in: IEEE 13th Topical Meeting on Electronic Performance of Electronic Packaging 2004, p. 217-220) discloses a method for determining a power supply impedance profile over a wide frequency range for an electronic chip (specifically: a CPU) by using clock tree amplitude modulation. The method comprises steps of:    1. periodically modulating the clock tree on and off, thus causing a quasi square wave current demand I(t) by the chip;    2. determining a square wave dynamic current consumption using a measurement of voltage drop across a shunt resister in a voltage regulator pathway at a low modulation frequency, and further calculating current amplitudes associated with harmonic components of the modulation frequency;    3. performing a Fourier decomposition of the square wave current consumption, thus yielding I(f);    4. measuring CPU power supply voltage values U(t) for the corresponding chip activities as a function of time;    5. transforming the measured CPU power supply voltage values V(t) into a frequency domain voltage signature U(f);    6. repeating steps 4 and 5 over plural clock tree modulation frequencies; and    7. evaluating the power supply impedance profile Z(f)=U(f)/I(f).
While this method enables a determination of a local power supply impedance profile Z(f), it is cumbersome since it requires an additional shunt resistor close to the power supply for carrying out a current measurement. Moreover, in order to obtain high measurement accuracy, multiple modulations of the clock tree with different modulation frequencies are required, and many measurement cycles have to be carried out.
Thus, there is a need for a simpler method for determining the power supply impedance profile Z(f) with high accuracy.